Section 5.3

Special 150- instructions in Programmer's Mode





Timing Flag


Branch Interlock


H.P.D. interrupt


Weak Reservations






Date and Time


Message to Flexowriter or Monitoring Peripheral


Question to Flexowriter


Read Directory




Directory information


Set Monitoring Style


Set Peripheral Incident


Set Monitoring Peripheral


Return from Private Monitoring


Start new branch


Return, from peripheral incident (or ENTER) with link routine.


Reserve peripheral


Relinquish Peripheral, float and select etc.


Set Geographical Name


Load Document


Set document if loaded


Set or request document


Change name


Get document name, Block 0


Write Block 0 unconditionally


Current Block address


Write non-sequential Block


Write Block 0 conditionally


Chapter Change


Load chapter of semi-built-in program or Basic Input


Change Drum Reservations


Change Core Reservations


Semi built-in Program In


5.3  Introduction

Only 3-address form is allowed and may be described as:-

"Call in Orion Monitor Program (OMP) to perform action Z on operands X and Y"

For legal values of Z, the permissible values of X and Y vary for each Z and are described for each 150-instruction.

The 150-instructions involve OMP reading from the drum (except for Z = 1 or 2 or 3 or 4)

The X-address and Y-address fields of legal 150-instructions may be replaced in the normal way and may be preceded by 116 and 117 instructions unless the contrary is explicitly stated.  Replacement and pre-modification involve an additional drum reference.

2-address forms of 150-instructions and illegal values of Z will cause illegal instruction action.

Erroneous values of X and Y will cause reservation violation, peripheral violation or impermissible operand action as appropriate.

If a 150-instruction is obeyed in a branched program then all branches are held up (suspended) until OMP has completed the 150-instruction.

Note that if the instruction format is used e.g. for the second word of a 150/16 or 21 or 50 instruction, then the 3-address instruction format should be used; the 2-address unmodified instruction format causes D8 (TX) bit to be set.