In this Section are given detailed descriptions of the various functions in the Orion instruction repertory. Each description is given in a precise symbolic form and also verbally. Exceptions and special cases are given and brief examples of the uses of some instructions. When discussing some of the simpler groups of functions, a general introduction to the group is given, followed by a short description of the individual functions within that group. The more complex instructions are described individually in detail.
It
is assumed that the reader is familiar with the differences between the
2-address and 3-address types and with the modification and replacement
facilities. In these descriptions the X- and Y-addresses are the effective
addresses at the time the instruction is obeyed, after all replacements and/or
modifications have been done, including possibly pre-modification by one or more
116 and/or 117 instructions.
Orion 1, like other machines of its generation, does not have fixed instruction times as do simple serial machines. The following are some of the more important factors which introduce variations into instruction times.
1) Carries
Orion has a parallel adder with a carry detection circuit and any micro-program operation which refers to the result of an addition or subtraction may be subject to a delay whilst waiting for this carry to die down. This applies particularly to the carries generated in a modification and the carry produced as a result of arithmetic orders although in this latter case, due to the carry-speed circuits and the fact that the next instruction is read before the result is written away, the maximum delay is 8 microsecs.
2) Address Checking
The address-checking circuits on Orion, for both lock-outs and reservations, operate in a synchronous serial manner. Reading from the core store can take place without waiting for the address checking to be completed, but at the end of each instruction that jumps or performs a write there may be a delay for this checking to be completed. The core store operates in 12 microsecs. and an address can be checked in 16 microsecs so that instructions which do 4 operations on three addresses, such as the two address 00 instruction, can operate in 48 microsecs although this depends on starting the instruction at the correct phasing with respect to the address checking. If an address which is being checked for lock-outs agrees with one of the lock-out addresses in the most significant 7 bits of the address (this address having been left justified through n places when the store has 215-n words) then the lock-out checking will take an extra l6 microsecs even though the word may not be locked out.
3) Hesitations
When a peripheral transfer is initiated the number of words or characters called for is added into the program timer although when reading magnetic tape or using modes 1 or 21 on paper tape there may be less actual hesitations. When a program is running at the same time as a peripheral device the peripheral device control unit has priority over the central machine in use of the core store and whenever the peripheral uses a core store cycle the timer does not get augmented; this happens whether or not the computer required access to the store at that time. The occurrence of hesitations prevents the computer from making effective use of the 12 microsec core store cycle, on the other hand if a hesitation occurs at the time a jump instruction is about to jump, the jump can actually take place quicker than it otherwise would.
The time taken to obey a section of program on Orion is not
directly the sum of the times for the individual instructions since each
instruction time is a function of the conditions at entry and so depends on the
preceding instructions in the program. None-the-less it is hoped that the
figures given below are useful averages when due notice is taken of the effects
described above. While efforts have been made to ensure accuracy, the times
required by instructions may, in the end, be different for technical reasons
from those given here.
This section gives the average time taken to obey instructions. For those which involve an arithmetical process (this includes comparisons made for jumps and table searching etc.) the time may be faster or slower than that stated, depending on the carries involved, i.e. on the operands. The timing for the floating-point instructions depends to a great extent on the operands.
3.A.1 Orion 1 Instruction Times ( Times in micro seconds)
Replacement of an address takes 16 microseconds.
|
3-address |
2-address |
2-add unmodified |
Group 0 |
80 |
80 |
64 |
(03 and 04) |
64 |
80 |
64 |
|
|
|
|
Group 1 |
64 |
64 |
48 |
(13 and 14) |
48 |
64 |
48 |
|
|
|
|
Group 2 |
As for Group 0 |
|
|
|
|
|
|
Group 3 |
|
|
|
30,31 |
208 |
208 |
192 |
32 |
240 |
240 |
224 |
33 |
272 |
288 |
272 |
34 |
80+F |
80+F |
64+F |
where where n is the number of significant bits in Y.
Group 4 (average times for 4 runs)
40 |
765 |
773 |
755 |
41 |
700 |
718 |
686 |
42 |
1725 |
1737 |
1728 |
43 |
588 |
598 |
571 |
44 |
620 |
626 |
608 |
45 |
621 |
631 |
610 |
Group 5
n is the number of places shifted.
50 to 53
n<24 |
64+4n |
64+4n |
48+4n |
n≥24 |
64+4(n-24) |
64+4(n-24) |
48+4(n-24) |
54 to 57
n<48 |
128+4n |
140+4n |
112+4n |
n>48 |
128+4(n-48) |
140+4(n-48) |
112+4(n-48) |
54 for n=48 |
129+192 |
140+192 |
112+192 |
55-57 for n=48 |
As for n>48 |
|
|
For 54 and 55 if x*<0 then partial justification takes 16 microseconds.
|
3-address |
2-address |
2-add unmodified |
Group 6 |
|
|
|
|
Jump, No Jump |
Jump, No Jump |
Jump, No Jump |
60 to 62 |
120, 80 |
96, 64 |
64, 32 |
63 and 64 |
112, 80 |
96, 64 |
64, 32 |
65 |
120, 64 |
96, 64 |
64, 32 |
66 |
120, 64 |
96, 64 |
72, 32 |
67 |
104, 80 |
96, 64 |
72, 32 |
Group 7 |
|
|
|
|
Jump, No Jump |
Jump, No Jump |
Jump, No Jump |
70 to 73 |
96, 64 |
80, 48 |
64, 32 |
74 |
80, 64 |
--, 48 |
--, 32 |
75 |
96, 48 |
80, -- |
64, -- |
76 and 77 |
96, 48 |
80, 48 |
64, 32 |
Group 8 |
|
|
|
|
Jump, No Jump |
Jump, No Jump |
Jump, No Jump |
80 |
128, 64 |
144, 80 |
128, 64 |
81 |
80, 112 |
96, 128 |
80, 112 |
82 |
112, 80 |
128, 96 |
112, 80 |
83 |
96, 96 |
120, 112 |
96, 96 |
84 |
96, 166 |
128, 192 |
96, 166 |
85 |
176, 80 |
208, 112 |
176, 80 |
86 |
64 |
80 |
64 |
87 |
72 |
96 |
64 |
Group 9 |
|
|
|
90 |
160 |
170 |
153 |
91 |
176 |
186 |
169 |
92 |
160 |
168 |
152 |
93 |
134 |
144 |
120 |
94 |
272 |
287 |
256 |
95 |
400 |
416 |
397 |
Group 10 |
|
|
|
100 |
560 |
560 |
52 |
101 |
1203 |
1251 |
1203 |
102 |
129+4n |
129+4n |
113+4n |
where n = no. of shifts to standardise |
|||
103 |
98+4n |
98+4n |
82+4n |
n=m or m-24, m is no. of places shifted |
|||
104 |
400 |
400 |
384 |
Group 11 |
|
|
|
110 and 112 |
96 |
80 |
64 |
111 |
88 |
80 |
64 |
114 |
112 |
112 |
96 |
115 |
80 |
92 |
64 |
116 |
28 |
32 |
28 |
117 |
32 |
32 |
32 |
Group 12
120
Y ≥
0, n = Y
68+4n
76+4n
48+4n
Y < 0, n = 3-Y
121
0
≤
Y ≤
23, n = Y
24
≤
Y ≤
255, n = Y-24 64+4n
64+4n
48+4n
-23
≤
Y ≤
-1, n = 3-Y
-255 ≤
Y ≤
-24, n = -21-Y
122 80 96 112
123 144+24E 172+24E 176
where E=8-n for n≠0 and E=0 for n=0, n being the number of characters to be changed.
124 96+4n 76+4n 48+4n
where n is the no. of places shifted. If Y<0 add 12 microsecs
125 224+4m
where m is the no. of shifts needed to standardise.
126 113 124 101
Group 14
142 112+20Y 128+20Y 112+20Y
143 96+30n 96+34n 96+30n
n is the number of words
144,145,146 112+20n illegal illegal
Times in microseconds
Replacement of an address takes 2.5 microseconds.
Modification of an address takes 3.5 microseconds.
Modification of two
addresses takes 4.5 microseconds.
* An asterisk indicates a typical value.
3-address and 2-address unmodified
Group 0
00, 01, 02, 05, 07
12
03
10
04 8.5
06
11
Group 1
10, 12, 15
10
11
11
13 8.5
14 6.5
16 8.5
17
10.5
Group 2
20, 21, 22, 25, 27
10.5
23
9.5
24
8.5
26
10
Add 1 microsecond for an odd pseudo-register.
Group 3
30
41.5
31
38
32
42
33
50
34
40.5
Group 4
40
152
41
150
42
294
43
150
44
153
45
153
Group 5
L = left shift, R = right shift, where L and R are directions of shift performed by the computer.
n = shift number
[x] = integral part of x.
Add 1 microsecond if shift number is negative.
d(x) = 1, x ≠ 0; d(x) = 0, x = 0.
50, 51 L 11 + n
50, 51 R 11 + + (n-1)mod 2 + d(n)
52,53 L 11 + 2 + + n mod 2
52, 53 R 11 + + + n mod 2
54, 55 L 19.5 + 2n
54,55 R 19.5 + + 2((n-1)mod 2) + 2 d(n)
56, 57 L 18.5 + 4 + 2 + 2(n mod 2)
56, 57 R 18.5 + 2 + + 2(n mod 2)
Add 1.6 microseconds for a partial justification.
3-address 2-address unmodified
Group 6
60
to 65
10.5
8.5
≠66,
67
10.5
8.5
≠ Add 1 microsecond for an odd pseudo-register.
3-address 2-address unmodified
Group 7
70
to 75
8.5
6
76, 77
10.5
6
3-address or 2-address unmodified
Group 8
80 to 83 |
11 |
84 Successful jump
) |
10.5 + 2.8 ((n+1)mod 8) |
84 Unsuccessful jump ) |
30 |
86 |
7.0 |
87 |
7.5 |
Group 9
90, 91 |
24 + n + 1.6m |
92 |
25 + n + 1.6m |
93 |
16.5 + 1.6m |
94* |
54 |
95* |
160 |
97 |
26 + n + 1.6m |
n
is the difference in exponents
m is the number of places of shifting needed for restandardisation
For 90, 91, 92, 93, and 97, add 1 microsecond if ye > xe.
Group 10
100* |
130 |
101* |
140 |
102* |
380 |
103* |
288 |
104* |
50 |
3-address | 2-address unmodified | |
Group 11 | ||
110 | 15 | 12 |
111, 112 ≠ | 14 | 10.5 |
114 | 15 | 15 |
115 | 12.5 | 12.5 |
116, 117 | 8.5 | 8.5 |
≠ Add 1 microsecond for an odd pseudo-register. |
Group 12
120 |
13.5 + 1.6n + m |
13.5 + 1.6n + m |
|
n is the number of places shifted. |
|
122 |
10.5 + m |
13 + m |
123 |
21 + 2m (m≠0);
14.5 (m=0) |
23.5+2m (m≠0); |
124
|
16 + 2.6n |
12.5 + 2.6n
|
125
|
217 + 70m
|
217 + 70m
|
* 126* |
220 |
220 |
Group 14
142 pair | 36.5 + 6.1n | 36.5 + 6.1n |
143 | 17.5 + 2.9n | 17.5 + 2.9n |
144, 145 | 13.5 + 4.9n | illegal |
146 |
16 + 7.5n |
illegal |