Section 2.2

Instructions, general


An Orion instruction is made up of a number of parts, the most important being its function (F) and three addresses denoted by X, Y and Z respectively.  In a written instruction these four parts are written on one line of a program sheet, on which four columns are ruled to correspond.  The way in which the instruction is written depends on which program-input routine is to be used to read it in; we use here the notation of Basic Input (see Sec. 7.1) in its simplest form, which is also applicable to some other routines.  The instructions making up a program are eventually punched into paper tape or cards according to conventions (punching rules) appropriate to the input routine to be used.  This input routine can then be used to read in the instructions, convert them to their internal form (machine-instructions) as needed by the computer and store them. A machine-instruction occupies one 48-bit word: an instruction word.


A simple instruction might be written as follows:

00      A100    A293    A18

In this instruction 00 is the function, which is written in a simple numerical code, and the other three items are the X, Y and Z addresses respectively.  We write:

F=00,  X=A100,  Y=A293,  Z=A18.

The effect of this instruction is to add the content of (i.e. the number in) register A100 to the content of A293 and to place the result in register A18.  The original content of A18 is lost but the contents of A100 and A293 are unchanged.  This is in fact a straightforward 3-address instruction. We can indicate symbolically the effect of this instruction by writing

z'= x + y.

In this notation x, y and z represent respectively the contents of X, Y and Z and the prime (in z' on the left-hand side) indicates a reference to the content after the instruction has been obeyed.  It is understood that

x'= x and y' = y

in a general 3-address 00-instruction (provided, of course, that Z is not equal to X or Y).


In most instructions the X and Y addresses can refer to any of the registers reserved for the program; they are called the main addresses.  The Z-address in an instruction, however, must be one of the program's accumulators (i.e. the registers whose basic addresses are A0 to A63).  The datum-point of the job is normally added to the X and Y addresses (if appropriate) by the program-input routine at the time when the program is read in, these two addresses are then machine addresses; they occupy 15 bits each in the 48-bit machine instruction.  The Z-address is, however, stored without its datum-point (which is added by hardware when the instruction is obeyed) and occupies 6 bits only.


The function is that part of an instruction which indicates the kind of operation to be carried out; it is represented by 7 bits in the machine-instruction. The first four of these function-bits represent an integer between 0 and 15 which is the group to which the function belongs; the least-significant three function-bits represent an integer between 0 and 7: this is the position of the function within the group. The group and position numbers are written next to one another in the standard written form of the function. The following are examples:

Written function


Position number

Function bits




0000 010




0101 111




1001 101




1100 100

The function in a written instruction is thus a 2- or 3-digit number in a mixed decimal-octal notation.


There are 16 groups of instructions in the instruction-repertory, each containing up to eight instructions. These groups are as follows: detailed descriptions of the instructions will be found in Sec. 3.

Group General Description of Functions


y an operand

) Addition, subtraction


Y an operand

) copying and simple


Pseudo-register operand

) logical operations.








Jumps, discriminations or tests, counting


Floating-point arithmetical operations




Miscellaneous logical operations




Peripheral devices, blocks of registers


Special operations involving the Monitor Program

The 48 bits in a machine-instruction are allocated in the way described in Sec. 2.0.1.


We described above (Sec. 2.2.2) the action of the 3-address 00-instruction:

00    A100    A293     A18

Most instructions also have a 2-address form. The following is a written 2-address 00-instruction:

00    A100    A293

Its effect is to add the contents of A100 and A293 (exactly as in the 3-address instruction); this result is then placed in A100, in place of the first operand. The effect of a general 2-address 00-instruction may be described as:

x' = x + y.

It will be noticed that Z is not used in the above instruction, which is described as being of "unmodified 2-address type".


In a general (modified) 2-address instruction the Z-address is used to specify a modifier which gets added into the X- or Y-address, or both, before the instruction is obeyed.  The modifier-part of a word is simply its 24-bit less-significant half; it is denoted by a suffix m so that the modifier in A40, for example, is denoted by A40m and the modifier in z is denoted by zm. In the instruction written

00Y     A100    A371    A40

the modifier in A40 will be used to modify the Y-address A371 (because Y is written after the function).  If, for example, the content of A40 is the integer 13 at the time when the above instruction is obeyed, then this instruction will have the same effect as if it had been written

00      A100    A384

The modification process which increases the Y-address takes place in the control circuits of the computer at the instant when the instruction is obeyed; the stored instruction is not itself changed by modification. To modify the X-address in a 2-address instruction we write X after the function instead of Y. To modify both main addresses (by the same modifier) we write XY.

Any of the accumulators A1 to A63 can be used directly to hold modifiers for a program. If A0 is used we get an unmodified instruction.


In the stored form of an instruction the two Type Bits (TX and TY) are used to specify the main addresses which are to be modified.  If either, or both, of these bits is a 1 then the corresponding main address is modified and the instruction is of 2-address type. If both of these bits are zero then the instruction is of 3-address type.  Conversion from the written form of an instruction to the internal machine-instruction is done by the program-input routine used to read in the program. Conventionally it is arranged that an instruction such as

00      A100    A384

(in which only two-addresses are written and neither X nor Y is written after the function) is stored as if it had been written

00X     A100    A384    A0

The effect of the Type Bits can be summarized as follows:

(a) Both type bits zero: 3-address type
(b) Either or both type bits one, Z=0: Unmodified 2-address type
(c) Either or both type bits one, Z≠0: Modified 2-address type


The Replacement Bits (RX and RY) provide the facility of indirect addressing. Either bit in a machine instruction can be made 1 by writing the corresponding main address in parentheses in the written instruction; otherwise the replacement bits are 0. Thus the instruction written

00     (A527)   A491    A61

will be stored with RX=1 and RY=0. The effect is to cause the X-address to be replaced by the modifier part of the specified register before the instruction is obeyed. If, for example, the content of A527 is the address A500 (i.e. the integer whose value is 500 plus the datum-point) then the above instruction will have the same effect as the instruction written

00      A500    A491    A61

Replacement occurs, like modification, only in the control circuits of the computer at the instant when the instruction is obeyed; the stored instruction does not get altered.


Replacement can be used on either of the two main addresses (but never on the Z-address) in any instruction of whatever type. If an address is specified as being both replaced and modified then the replacement occurs first and the replaced address is then modified. For example, the instruction

00Y     A100   (A412)   A55

would have the same effect as the instruction written

00      A100    A319

if A412 contained the address A300 and A55 contained 19 at the time the instruction is obeyed.


In describing the effects of an instruction we use the symbols X, Y, x, y, x', y'. These refer always to the effective addresses (and their contents) - i.e. to the addresses after any modification and replacement have been carried out.


The modification and replacement facilities which have just been described are capable of handling most of the address-computations needed.  More complicated processes can be obtained, if necessary, by using the 116- and 117-instructions described in Sec.3.11.  If even these are insufficient then addresses can be computed by using any sequence of instructions and left in a register for use by means of replacement.


It should be noted that replacement and modification use the modifier-parts of registers, i.e. the 24-bit less-significant halves.  In a machine instruction the main addresses occupy 15 bits each; these are extended to 24 bits by adjoining 9 zeros at the m.s. end when the instruction is obeyed.  These 24-bit addresses are modified and replaced as necessary.  The effective addresses X and Y are thus 24 bits long, in general.  When such an address is used (as it frequently is) to refer to a register, only the l.s. 15 bits are employed - the m.s. 9 bits are then disregarded.  The Y-addresses in shift-instructions and in 102-, 103-, 120-, 121-, 124- and 141-instructions are specially treated (see Sections 3.5, 3.10, 3.12 and 3.14).


Most of the instructions in the repertory have both 2-address and 3-address forms.  The general rule for deriving the 2-address form from the 3-address form is:

replace z' by x' (and z*' by x*'),

replace z by zero

in the defining equations (and relations) of the 3-address form.  There are, however, some instructions which do not follow this rule - notably the jump instructions of group 8.

Some instructions use or alter adjacent registers to those named.  To describe these we use the notation exemplified by the following:

(a) x* is the content of X+1,

(b) z*' is the content of Z+1 after obeying the instruction

This notation is useful, for example, in describing instructions with double-length operands, where x is the m.s. half and x* the l.s. half of the operand.  Such an operand is often written as x: (see Sec. 2.0.2e). The notation used in the Manual is summarized for reference in Sec. 0.4.


Signals are instructions which are marked in a certain way with a view to possible monitoring action during program-testing. They are written with a capital letter S after the function (and modification letters X or Y). For example:

01XS    A1234   A9      A5

The corresponding machine-instruction has its signal-bit (see Sec. 2.0.1) equal to zero. See Sec. 5.2.1 for a description of events when a signal-instruction is encountered.


In the normal or "automatic" condition the instructions in a program are obeyed sequentially from the registers of the working store. The machine-address of the instruction currently being obeyed is called the control number and is sometimes denoted by c. This number gets 1 added to it during the execution of an instruction and is then available to select the next instruction. This regular sequential selection of instructions may be interrupted by a successful jump instruction, which sets c to a new value, or by an interruption connected with monitoring or time-sharing, when the current value of c is stored for possible later return. The control number is displayed on the main control panel in the lower half of J (see Sec. 2.4.4 and 2.4.5).


Various notations will be found in the descriptions (in Sec. 3) of the effects of various instructions. For example, an operand in X may be referred to as x, xI , xF , xG , xL or as a word made up of 6-bit characters, and so on. These notations are chosen so as to make the descriptions of the instructions as simple as possible and to indicate their most common or intended applications. They are not to be taken as indicating any restrictions on the significances of the words used with these instructions. These significances are the concern of the programmer and not of the machine.


There is a single overflow-indicator, commonly referred to as OVR, which is used to indicate whether capacity has been exceeded in arithmetical operations. If, for example, the words in A100 and A200 each have the value +0.75 on the fractional convention (see 2.0.2b) then the instruction

00      A100    A200    A3

will attempt to produce +1.5, which is not representable on the fractional convention. We say that capacity has been exceeded or that overflow has occurred. If monitoring on overflow is not turned on (see Sec. 5.2.3) then the overflow-indicator will be set (whether or not it was set before) and a result will be stored which is arithmetically wrong (the above instruction will place -0,5 in A3 since 0-group instructions always produce the in-range fraction congruent modulo 2 to the correct result). If monitoring on overflow is turned on then the overflow-indicator is unaltered, the instruction is not completed (i.e. no result is written away) and the Monitor Program is called in (see Sec. 5.2.3),whether or not the overflow-indicator was previously set.

The attempted computation of a floating-point number which exceeds capacity is called floating-point overflow (see Section 3.9); this will also set the overflow-indicator unless monitoring action is called for.

The state of the overflow-indicator can be found by referring to pseudo-registers 4 to 7 (see Section 2.6).


Overflow can occur in any instruction whose function is in this list:

00,01,02,03; 10,11,12; 20,21,22,23;  30,31,32,33,34;
40,41,42,43,44,45; 50,51,54,55; 80,81,82,83,87;  
90,91,92,93,94,95; 100,101,102,103; 126.  

In addition the special 150-instructions with Z = 23,30,34,52 or 53 (see Section 5.3) and the 152-instruction (not in Programmers' Mode) may cause OVR to get set.


Floating-point overflow can occur in any instruction whose function is:

90, 91, 92, 93, 94, 95 or 102.


The overflow-indicator may be cleared by instructions having the following functions:

86, 102, 125, 126

or by any instruction referring to pseudo-registers 4 or 5 (the functions of such instructions may be: 20 to 27, 66, 67, 112). (The pre-150 instruction (see section 3.15) will also clear OVR). These instructions are the only ones which clear the overflow-indicator, which will otherwise remain set after overflow has occurred.


Subject to the special rules governing the construction of compound instructions, which are described in Section 0.3 (Glossary, under "compound instruction"), and the special 150-instruction with Z=50, which is always followed by another word (see Section 5.3.50), any sequence or combination of legal instructions is permitted except an instruction which overwrites the instruction which is to be obeyed next. The need for tampering with stored instructions in this way is not likely to arise in practice owing to the ample provisions for modifying and replacing the addresses in obeyed instructions (see Sections 2.2.7 to 2.2.13). In those rare cases when it is necessary, e.g. when the function-part of an instruction has to be computed, then at least one instruction (possibly a dummy) must be obeyed between (a) the instruction which creates the new instruction (and overwrites the old) and (b) the new instruction itself. The following sequence is, for example, permissible:

OVER)   04      NEW      INSTR   |plant new instruction in NEW
        117     0        0       |dummy instruction
NEW)    04      A1       A1      |gets overwritten

Here the dummy instruction must not be left out or the old form of the instruction in register NEW will be obeyed (unless there happens to be an interruption after the instruction labelled OVER is obeyed). A less obvious example is provided by a counting instruction (with function 80 to 83) which counts in and then jumps to another instruction but this kind of programming trick is normally to be avoided on other grounds. This restriction is necessary because the execution phases of successive instructions are overlapped, the computer extracting the next instruction from the working store before the current instruction is completed. This overwriting of the next instruction is, of course, permissible when it does not matter whether the old or the new form of the instruction is obeyed (for example, it is permissible to write into the Y-address of an immediately following 3-address 86-instruction or into a special 150-instruction, which is in any event interpreted by the Monitor Program).


If an address is replaced then one of the earliest processes, in obeying the instruction, is to check this address for lock-outs and reservation violation. If this address is locked out or does violate reservations then the corresponding action will take place. For example, the instruction

         37     (A0-1)   A100

will cause the program to be suspended because of reservation violation and not because it is an illegal instruction.


In some instructions the defining equation (i.e. the equation indicating the effect of the 3-address form of the instruction) does not contain a reference to all three addresses or their contents, e.g. the defining equation for the 03- instruction is z'=y and no reference is made to X or x. X, in this case, is a redundant address and when such an instruction is obeyed X is not used. The redundant address is not checked for lockouts and reservation violation unless replaced. If it is replaced because of replacement (see 2.2.23) the address will be checked for lock-outs and reservation violation but it will not be used, i.e. it is still redundant.

In the following 3-address instructions the X-address is redundant:     03, 13, 04, 14, 23, 24, 93

In the following 3-address instructions the Y-address is redundant:     86, 87

In the following 3-address instructions the Z-address is redundant:     116, 117, 140, 141, 142

The X- and Y-addresses in some compound pairs of the 140, 142 and 142-instructions are redundant.

  (i)   For all devices
        Mode 13 (Interrogate). The Y-address of the 142-instruction is redundant.
 (ii)   For all devices except the drum, and magnetic tape
        Mode 16 (Disengage). The X- and Y-addresses of the 142-instruction are redundant.
(iii)   For Magnetic Tape
        Mode 14 (Rewind), The X- and Y-addresses of the 142-instruction are redundant.
(iv)   Internal Transfer
        The Y-address of the first 142-instruction is redundant.

Destination addresses of unsuccessful jumps are not checked for lockouts and reservation violation unless replaced, see 2.2.23.

The information in this section refers in general both to Orion 1 and Orion 2. Described here are the differences to be noted when reading these subsections for Orion 2.

Section 2.2.16. Because the control panel is different on Orion 2, the control number is displayed but not on Orion 2's J register.

Section 2.2.22. Orion 2 can overwrite instructions as there is no overlap as there is on Orion 1